IBM claims to have developed the first chip technology with a size under 1nm.

      IBM has revealed that it has created the world's first sub-1nm chip technology, featuring a transistor architecture at what it refers to as the 0.7nm, or 7-angstrom, node. This achievement is a significant milestone that the semiconductor industry has been striving to reach for years, and such a claim requires careful consideration, as a node designation is no longer a measurement of anything tangible.

      The technology is based on a design called “nanostack,” which IBM describes as the industry's first three-dimensional, nanosheet-based transistor architecture. Instead of arranging transistors on a flat surface and reducing the space between them, nanostack vertically stacks and staggers them, utilizing 3D sequential integration to accommodate more transistors in the same area.

      This approach also allows engineers to utilize various material combinations in each layered stack, enabling independent tuning of each transistor's performance and power. The key figure here is transistor density. IBM claims that the chip contains nearly 100 billion transistors on a piece of silicon the size of a fingernail, nearly double the density of the 2nm chip introduced in 2021.

      According to the company's published findings, this new node provides up to 50% greater performance and up to 70% improved energy efficiency compared to the 2nm generation. However, these figures are projections based on research results, rather than actual numbers from a commercial product, and they describe different operational scenarios instead of a single chip achieving both metrics simultaneously.

      Supporting research backs up this announcement. In studies presented at VLSI 2026, IBM stated that nanostack offers 40% scaling in SRAM, a critical on-chip memory type that has historically resisted miniaturization, which is crucial for the high-bandwidth demands of AI applications. IBM also claims to have validated the architecture using dielectric bonding within CMOS integration and demonstrated a functioning CMOS inverter, indicating that the structure can indeed be physically constructed and is capable of switching, not just simulated.

      “With our new nanostack architecture, we’re not merely creating smaller transistors; we’re transforming the way chips are constructed,” stated Jay Gambetta, director of IBM Research.

      This context is important, as the industry has moved beyond literal dimensional scaling for some time now. A “0.7nm” node does not imply that any feature measures 0.7 nanometers; it serves as a generational identifier. What IBM is asserting is that nanostack allows logic to enter the territory below the 1nm node, which they describe as angstrom-scale, where dimensions approach the size of individual atoms.

      The research was conducted at the Albany research facility in upstate New York, which is set to house a High-NA EUV lithography tool from ASML, considered essential for printing circuits at these small dimensions. IBM has acknowledged contributors such as Lam Research, Tokyo Electron, and SCREEN Semiconductor Solutions, and mentioned its recent establishment of Anderon, a dedicated quantum foundry, as part of its efforts to maintain advanced chip manufacturing domestically.

      ASML’s High-NA equipment has sparked debate in the industry regarding costs, with TSMC initially expressing skepticism about the pricing.

      An important caveat accompanies every IBM chip announcement: the company divested its manufacturing operations to GlobalFoundries in 2014, and now focuses on developing technology to be licensed and fabricated by others. Thus, this represents a research milestone rather than a market-ready product. IBM anticipates that a path to production could take as long as five years, a considerable timeline during which much could change. Currently, IBM has a functioning structure in the lab, a roadmap that it claims provides the industry with another decade of scaling, and a node name that serves primarily as an expression of intent.